Altiumcustomize

Design Rule Verification Report

Date : 2018/6/14
Time : 17:24:06
Elapsed Time : 00:00:01
Filename : C:\Users\yaopp\Desktop\tufjiPCB\tufjiPCB\Smart_Belt.PcbDoc
Warnings : 0
Rule Violations : 0

Summary

Warnings Count
Total 0

Rule Violations Count
Modified Polygon (Allow modified: No), (Allow shelved: No) 0
Net Antennae (Tolerance=0mil) (All) 0
Silk to Silk (Clearance=0mil) (All),(All) 0
Silk To Solder Mask (Clearance=0mil) (IsPad),(All) 0
Minimum Solder Mask Sliver (Gap=6mil) (All),(All) 0
Hole To Hole Clearance (Gap=6mil) (All),(All) 0
Hole Size Constraint (Min=12mil) (Max=200mil) (All) 0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All) 0
Width Constraint (Min=6mil) (Max=50mil) (Preferred=10mil) (All) 0
Power Plane Connect Rule(Relief Connect )(Expansion=10mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All) 0
Clearance Constraint (Gap=6mil) (All),(All) 0
Un-Routed Net Constraint ( (All) ) 0
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Room Smart_Belt (Bounding Region = (885mil, 610mil, 7700mil, 6100mil) (InComponentClass('Smart_Belt')) 0
Total 0